Senior Staff Verification Engineer — Lead Digital & Mixed-Signal

Infineon Technologies Austria AG is seeking a Senior Staff Engineer Verification in our Research & Development team. You will define verification plans for digital verification of Mixed Signal designs and develop advanced verification environments using SystemVerilog, UVM, and Constrained Random techniques.

You will execute tests on RTL and gate-level, debug issues, and lead a team of verification engineers, collaborating closely with analog and digital designers as well as other verification